PCIe 4.0 modifies the Link Training Status State Machine (LTSSM). A specific phase, , was enhanced to allow for more granular coefficient negotiation between the Root Complex (CPU/Chipset) and the Endpoint (Device).
The PCI-SIG (Peripheral Component Interconnect Special Interest Group) owns the specification. You can download it from their website: 👉 pcisig.com/specifications pcie specification 4.0 pdf download
Download. 10/05/2017. 4.0. This specification describes the PCI Express® architecture, interconnect attributes, fabric management, Specifications - PCI-SIG PCIe 4
Like PCIe 3.0, the 4.0 spec utilizes . This is an improvement over the older 8b/10b encoding used in PCIe 1.0 and 2.0, which incurred a 20% overhead. The 128b/130b scheme results in an efficiency of roughly 98.5%, ensuring that the doubling of frequency translates directly to nearly double the usable bandwidth. You can download it from their website: 👉 pcisig
The primary leap in the 4.0 generation is the increase in raw throughput and data transfer rates: PCI Express Base Specification Revision 4.0, Version 1.0
PCIe 4.0 mandates the use of and Preset configurations. The transmitter reduces the voltage swing for consecutive identical bits (boosting the high-frequency components relative to low-frequency components) to pre-distort the signal, counteracting the channel's low-pass filter effect.